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AutoPCB

Coming soon

From natural-language requirements to a Gerber package: schematic, placement, autorouting and DRC in one browser.

Request information Specifications
Four stacked glass layers — requirements, schematic, placement and Gerber — linked by rising glowing PCB traces.

Overview

The problem. In a small electronics team, board design passes through three separate tools and two separate skill sets: the requirements document, the schematic tool (KiCad/Altium), then layout and Gerber output. Recurring blocks (USB-C + LDO + MCU module + LED) are redrawn in every project; library parts are entered by hand from datasheets; team members cannot edit the same file at the same time. DRC errors are caught late, only when the manufacturing files are generated.

The solution. AutoPCB takes requirements in three ways: natural language in Turkish or English ("temperature logger with USB-C charging, an 18650 cell, an OLED display and BLE"), a wizard or a template. An LLM turns this into a structured requirements model; a topology solver synthesizes a draft schematic from known blocks (power supply, MCU module, USB, sensor), and the LLM refines and blends it where needed. In the Konva-based schematic editor the user adds parts and draws wires; the BOM is grouped by part number and exported to CSV.

Board and manufacturing. In the PCB tab, the board outline and footprints are placed (a connectivity-weighted auto-placer), and a Dijkstra-based two-layer autorouter routes the board, inserting vias where needed. ERC (union of AI and drawn netlists, differential-pair rules, BOM↔schematic cross-check) and DRC (clearance, vias, board edge, severity grading) run on the design. The manufacturing tab delivers RS-274X Gerber, an Excellon drill file and a JLCPCB-format pick-and-place CSV in a single ZIP. With Yjs CRDT the team edits the same project concurrently, backed by an offline IndexedDB cache. Component drafts are extracted from datasheet PDFs (including vision-LLM OCR for scanned documents); versioned parts are published and voted on in the community library.

Four glass layers rising from requirements to schematic, placement and Gerber, with glowing PCB traces routing themselves between them.
Concept

This product is in development or field testing. Contact us for technical information, pilot use and a preliminary quotation.

Features

  • Three-way requirement capture: natural language (TR/EN), wizard or template; requirements imported from PDF.
  • Topology synthesis + LLM blending: known blocks (USB-C, LDO, RP2040/STM32G0/ESP32/ATmega/PIC MCU modules, LoRa, I2S audio) are resolved in priority order; the LLM only refines, and the deterministic core is preserved.
  • Placement hints: per-part placement hints and fixed positions; 0R fanout stubs.
  • DRC-aware router: via and track placement costs reflect DRC bands; escape from fine-pitch pads with a "mouth-via" rule.
  • Severity-graded DRC: geometrically unavoidable no-net pad violations are suppressed.
  • Concurrent teamwork: schematic, PCB and BOM are edited simultaneously with Yjs CRDT; offline changes are kept in an IndexedDB cache and merged when the connection returns.
  • Immutable component versioning: older designs keep the older part version; a published or used version cannot be deleted.
  • Community library: part publishing, voting, a "used in N projects" indicator and version history.
  • Datasheet → part: component drafts from the PDF text layer, with vision-LLM OCR for scanned documents.
  • Manufacturing package: RS-274X Gerber, Excellon drill file, JLCPCB-format pick-and-place CSV and BOM CSV in a single ZIP.
  • Deterministic testing: AI calls are recorded and replayed; every release passes a test gate that verifies byte-identical results on the reference designs.

Specifications

Values marked “Target” are design targets, next-generation values or chip-vendor data; they are updated as measurement and certification are completed.

Deployment
Deployment modelSelf-hosted; backend and frontend services on Node.js ≥ 18
PackagingDocker image and cloud SaaS editionTarget
DatabaseSQLite (better-sqlite3), single file
Multi-tenant databasePostgreSQLTarget
UpdatesGit + npm
CI/CDAutomated build and deployment pipelineTarget
BrowserCurrent Chrome / Edge / Firefox on desktop; WebGL/Canvas
Server resourcesNode.js ≥ 18, ~1 vCPU / 1 GB RAM (estimate); no extra build tools needed for OCR
AI provider keyMinimax or Anthropic API key; mock provider for operation without external calls
Architecture
Software stackTypeScript monorepo (shared / backend / frontend); Express; Vite + React + Tailwind + react-konva; Yjs CRDT; ESM
Data modelProject: requirements, schematic (sheets, nets), BOM, PCB (outline, footprints, tracks, vias); immutable component version rows; audit log
AutorouterDijkstra, 2 layers, 0.5 mm grid, via insertion, soft costs reflecting DRC bands, post-route via nudging
DRC / ERCDRC: clearance, via diameter/drill, board edge, no-net pad suppression; ERC: 19 rules + differential pairs + BOM↔schematic cross-check
Manufacturing outputGerber RS-274X, Excellon, pick-and-place CSV (JLCPCB format), BOM CSV
Test gate74/74 unit tests, 67/67 Playwright UI tests; fast smoke test (10 probes), collaboration test and byte-identity verification
Integrations
REST APIEndpoints for auth, projects, components (search, versions, publishing, votes, usage), AI (requirement parsing, topology suggestion, synthesis/refine/blend over SSE), export (Gerber, BOM CSV), autorouting, footprint placement, ERC and DRC
Real timeYjs WebSocket rooms (schematic, PCB, BOM, library) and user presence
AI providersMinimax M3 (default; multimodal OCR), Anthropic (claude-sonnet-4-6), mock, replay
ImportPDF datasheets
Additional formatsKiCad / Eagle import; STEP / 3D exportTarget
Security & data
AuthenticationEmail/password + JWT; optional authentication for public read access
AuthorizationProject ownership; author and voting rules for community parts (no voting on your own part)
Enterprise identity and accessRBAC roles and SSOTarget
Data residencyOn the customer's server when self-hosted; LLM calls send requirement text and datasheet images to the selected provider (can be avoided with the mock provider or a local model)
Privacy and transportKVKK privacy notice and data processing agreement; TLS via reverse proxyTarget
Licensing & support
Source licenseTo be finalized before releaseTarget
Commercial modelSelf-hosted (free / internal use), team subscription (per user per month), enterprise licenseTarget
SupportEmail, response within 2 business daysTarget
Roadmap
CompletedMVP: AI schematic synthesis, autorouter, ERC/DRC, concurrent editing (CRDT), part extraction from PDF/OCR, community library
Next3D viewer, KiCad/Eagle import, ground pour, 4 layers, PostgreSQL, Docker, pricing plans, direct upload to manufacturer DFM checksTarget

Applications

  • MCU-based board design
  • Small electronics design teams
  • Training and prototyping workshops
  • Bid-stage BOM estimation
  • Carrier and application boards
  • IoT sensor and logger boards

At Elmes. Fast first schematics and layouts for I/O Carrier Boards (EC), the Wireless Gateway / RTU and application boards of the Elmes OEM Device Control Platform; quick block diagrams and BOM estimates for Contract Electronics Product Development quotations.

Target users. Small and mid-sized electronics teams designing MCU module + power + interface boards (a hosted SaaS edition is planned); training and prototyping workshops that demonstrate the end-to-end flow from requirements to manufacturing files.

Reference design set. Every release is verified against these sample boards: an ESP32-C3 temperature logger, a power-supply-only board, a LoRa node, a PCM5102A I2S audio board, and boards built around RP2040, STM32G0, ESP32, ATmega328 and PIC16F modules. All are 100 % routed and DRC-clean (0/0/0).

Compliance & documentation

AutoPCB is a software product and requires no mandatory product certification. Manufacturing outputs use industry-standard formats; user-facing documentation is being prepared according to the plan below.

  • Manufacturing file formats (Gerber RS-274X, Excellon)
    Verified with the JLCPCB viewer; upload to real manufacturer DFM checks is planned
    Self-declared
  • Technical documentation (quick start, architecture, API overview)
    Available
  • User guide
    Target
  • API reference (OpenAPI)
    Target
  • KVKK and data processing documents
    Together with the SaaS edition
    Target
  • Third-party license inventory
    Target
  • Source code license
    To be finalized before release
    Target
  • Mandatory product certification
    Software product; no mandatory certificate
    Out of scope

Frequently asked questions

How many layers are supported?

The current release supports 2 layers. 4 layers and ground pour are on the roadmap.

Which AI model does it use, and where does my data go?

The default provider is Minimax M3, with Anthropic as the alternative; with the mock provider no external calls are made at all. In a self-hosted installation your data stays on your server; only the requirement text and datasheet images go to the selected provider.

Can I import my KiCad or Altium project?

Not yet; KiCad/Eagle import is on the roadmap.

Does the autorouter route every board?

No. Fine-pitch packages (0.4–0.8 mm QFN/LQFP, 0.5 mm USB-C) cannot be routed under the via-in-pad rule; wide-pitch module footprints are recommended. Remaining tracks are routed by hand.

Which manufacturers are the output files suitable for?

Outputs are standard Gerber RS-274X, Excellon and a JLCPCB-format pick-and-place file; the defaults (e.g. 0.15 mm annular ring) match JLCPCB/PCBWay standard capabilities.

Can a team work on the same project at the same time?

Yes. Schematic, PCB and BOM are edited concurrently with Yjs CRDT; offline changes merge when the connection returns.

How reliable is creating parts from datasheets?

It produces a draft; pin count and package must be checked. OCR on scanned PDFs is limited to 4 pages; encrypted PDFs have not been tested.

What about licensing and pricing?

The source license and pricing model will be finalized before release. Self-hosted, team subscription and enterprise license options are planned.

Get information about this product

Our engineering team replies within 24 hours.

Request information +90 (312) 395 85 86

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